דרושים»הנדסה» Senior DFT Engineer

לפני 18 שעות חברה חסויה Location: Job Type: As a Senior DFT Engineer at Astera Labs, you will be at the intersection of architecture, design, and production. You won't just run tools-you will be a foundational member of the team responsible for the entire lifecycle of our silicon's reliability. From defining initial DFT architecture to supporting post-silicon bring-up, your work ensures that the backbone of AI infrastructure connectivity is flawless and scalable. If you thrive on solving complex challenges in deep-submicron processes and want to establish world-class DFT methodologies, this is your opportunity.

Key Responsibilities

DFT Architecture & Strategy

Own the DFT journey from high-level architecture definition and RTL design to backend implementation and post-production support Develop comprehensive Design-for-Testability (DFT) strategies for next-generation connectivity platforms, ensuring chips meet the highest quality standards Define DFT architectures including JTAG/iJTAG, MBIST, Scan, and ATPG methodologies Test Pattern Development & Optimization

Generate and optimize high-quality test and debug patterns for production Perform Static Timing Analysis (STA) for DFT modes and conduct gate-level simulations to ensure robust performance Drive test coverage and quality metrics to meet stringent manufacturing requirements Cross-Functional Collaboration & Methodology Innovation

Act as a multidisciplinary bridge, collaborating closely with Architecture, Verification, and Backend teams to ensure seamless integration and optimal QoR Participate in developing and maintaining cutting-edge DFT implementation flows Automate and improve methodologies using advanced scripting and toolsRequirements: Bachelor's degree in Electrical Engineering or related technical field 3+ years of hands-on experience in DFT roles at semiconductor companies Deep expertise in DFT flows and architectures including JTAG/iJTAG, MBIST, Scan, and ATPG Proficiency with industry-standard EDA tools from Synopsys (TestMAX) or Mentor (Tessent) Strong understanding of logic design, verification, debug, and Static Timing Analysis (STA) Scripting proficiency in Tcl, Perl, Python, or Shell for automation and innovationThis position is open to all candidates. Hide