Digital IC Design Engineer (Campus/New Grad/Experienced)

Job Posting: Digital IC Design Engineer (Campus/New Grad/Experienced) Position Type: ​ Full-time Location: ​ Singapore Posting Date: ​ April 1, 2026 About Us We are a cutting-edge chip design company based in Singapore with a global vision, specializing in artificial intelligence, high-performance computing, and next-generation core chip solutions. We are committed to innovation at the technological forefront. In the vibrant tech hub of Singapore, we provide an exceptional platform to transform academic theory into world-class products. Responsibilities Core RTL Development: ​ Perform block-level or subsystem-level digital circuit design, implementation, and optimization using Verilog HDL . Write high-quality, synthesizable RTL code. Chip Front-End Flow: ​ Participate in the complete IC design ​ front-end flow, including architecture exploration, logic synthesis, formal verification, static timing analysis (STA), and low-power design. Design Verification Collaboration: ​ Work closely with the verification team, understand verification plans, assist in debugging, and ensure design functionality and performance meet targets. Technical Documentation: ​ Prepare clear design specifications, implementation plans, and review documents. Qualifications [For Experienced Engineers (1+ years of experience)] Required Skills: Master's or Bachelor's degree in Microelectronics, Electronic Engineering, Computer Engineering, or a related field. Proficient in Verilog/VHDL ​ with a solid foundation in digital IC design ​ and RTL coding . Proven experience in successful block-level delivery through to tape-out.Familiar with the complete ASIC/SoC front-end design flow and related tools (e.g., Synopsys/Cadence suite). Preferred Qualifications: Experience in any of the following domains: CPU/GPU microarchitecture, high-speed interfaces (PCIe, DDR), AI accelerators, networking.Familiar with on-chip bus protocols (e.g., AMBA) and scripting languages (Python/Tcl). [For New Graduates / Interns] Educational Background: ​ We enthusiastically welcome applications from outstanding students (final-year undergraduate or Master's) or recent graduates from top global universities. We strongly encourage candidates with backgrounds in Microelectronics, Electronic Engineering, or Computer Science from Nanyang Technological University (NTU), National University of Singapore (NUS), or equivalent institutions to apply. Core Aptitude: Possess a high passion for chip design ​ and a solid theoretical foundation in digital circuits.Proficient in the Verilog ​ hardware description language, with hands-on RTL ​ design practice from course projects or research.Understanding of fundamental digital design ​ processes (e.g., logic synthesis, simulation, verification). Projects & Abilities: Outstanding performance in FPGA projects, digital design competitions, or related research projects is a plus.Excellent learning, analytical, and problem-solving skills.Strong communication skills in both Englis