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View All Jobs SoC Architect ASIC Stockholm,Stockholm,Sweden
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About the Opportunity
Ericsson’s Product Engineering Unit Silicon drives the architecture and development of Digital ASICs and SoCs that power current and future generations of mobile networks. Our Silicon System & Architecture organization defines system-level concepts, accelerator architectures, and micro-architectures that underpin Ericsson’s Radio and Compute product portfolios.
You will join a highly skilled team of 7 senior technical leaders responsible for setting the direction of next-generation Digital ASICs. Together with the rest of the system team, the mission is to define accelerator solutions that improve radio and baseband performance, increase energy efficiency, and enable hardware–software co-optimization across the stack.
This role is suited for a senior architect who thrives in early-phase definition, systemization of complex hardware accelerators, and alignment across multiple technical domains. Your contributions will directly strengthen and expand Ericsson’s accelerator leadership.
What You Will Do
Define architecture and systemization for next-generation hardware accelerators, including matrix processors for AI/ML inference, signal processing, and radio workloads. Specify, justify, and evaluate new accelerator features with a focus on performance, determinism, and power efficiency. Drive micro-architecture development for accelerator blocks and subsystems and produce high-quality specifications used by design and verification teams. Collaborate with the Accelerator IP Program, SoC architects, and Radio/RAN Compute organizations to translate system requirements into ASIC-level architecture. Guide implementation teams throughout design, verification, and validation. Contribute to methodology improvements for modeling, architectural exploration, and system-level workflows. Work closely with technical leaders across the organization to align architectural direction, ensure feasibility, and realize system-level optimization goals.
Skills You Bring
Essential
Master’s or PhD in Electronic Engineering or equivalent. Proven experience in systemization and architecture of hardware accelerators, ideally for real-time or high-performance systems. Strong background in advanced Digital ASIC/SoC development, from concept through specification to implementation support. Solid understanding of ASIC design flows, EDA environments, and modeling methodologies. Proficiency in VHDL and/or SystemVerilog. Strong programming capability in relevant languages (e.g., Python, Julia, MATLAB, C/C++). Excellent skills in linear algebra, neural networks, and signal-processing algorithms. Demonstrated technical leadership, with the ability to drive complex work both independently and collaboratively. Experience with GIT and modern development workflows.
Can Be Learned in the Role
Ericsson-specific accelerator IP frameworks and architectural methodologies. ML toolchains (e.g., Llama or similar) as applied to ASIC accelerator design. Domain-specific radio and RAN Compute use-case optimization.
What happens once you apply?
Click Here to find all you need to know about what our typical hiring process looks like.
We encourage you to consider applying to jobs where you might not meet all the criteria. We recognize that we all have transferrable skills, and we can support you with the skills that you need to develop.
Encouraging a diverse and inclusive organization is core to our values at Ericsson, that's why we champion it in everything we do. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity Employer. learn more.
Primary country and city: Sweden || Stockholm/ Lund
Primary Recruiter: XXXX XXXX
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Find out how well you match with this job Upload your resume
Find out how well you match with this job
Job description Company and benefits Job ID 777500 Join our Team
About the Opportunity
What You Will Do
Skills You Bring
Essential
Can Be Learned in the Role
What happens once you apply?
Primary Recruiter: XXXX XXXX
About the Opportunity
What You Will Do
Skills You Bring
Essential
Can Be Learned in the Role
What happens once you apply?
Primary Recruiter: XXXX XXXX
About the Opportunity
What You Will Do
Skills You Bring
Essential
Can Be Learned in the Role
What happens once you apply?
Primary Recruiter: XXXX XXXX
Job description Company and benefits
Job description Company and benefits
Job description Company and benefits
Job ID 777500 Join our Team
About the Opportunity
What You Will Do
Skills You Bring
Essential
Can Be Learned in the Role
What happens once you apply?
Primary Recruiter: XXXX XXXX
Job ID 777500 Join our Team
About the Opportunity
What You Will Do
Skills You Bring
Essential
Can Be Learned in the Role
What happens once you apply?
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Join our Team
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About the Opportunity
Define architecture and systemization for next-generation hardware accelerators, including matrix processors for AI/ML inference, signal processing, and radio workloads.
Specify, justify, and evaluate new accelerator features with a focus on performance, determinism, and power efficiency.
Drive micro-architecture development for accelerator blocks and subsystems and produce high-quality specifications used by design and verification teams.
Collaborate with the Accelerator IP Program, SoC architects, and Radio/RAN Compute organizations to translate system requirements into ASIC-level architecture.
Guide implementation teams throughout design, verification, and validation.
Contribute to methodology improvements for modeling, architectural exploration, and system-level workflows.
Work closely with technical leaders across the organization to align architectural direction, ensure feasibility, and realize system-level optimization goals.
Master’s or PhD in Electronic Engineering or equivalent.
Proven experience in systemization and architecture of hardware accelerators, ideally for real-time or high-performance systems.
Strong background in advanced Digital ASIC/SoC development, from concept through specification to implementation support.
Solid understanding of ASIC design flows, EDA environments, and modeling methodologies.
Proficiency in VHDL and/or SystemVerilog.
Strong programming capability in relevant languages (e.g., Python, Julia, MATLAB, C/C++).
Excellent skills in linear algebra, neural networks, and signal-processing algorithms.
Demonstrated technical leadership, with the ability to drive complex work both independently and collaboratively.
Experience with GIT and modern development workflows.
Can Be Learned in the Role
Ericsson-specific accelerator IP frameworks and architectural methodologies.
ML toolchains (e.g., Llama or similar) as applied to ASIC accelerator design.
Domain-specific radio and RAN Compute use-case optimization.
What happens once you apply?
Primary Recruiter: XXXX XXXX
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