דרושיםLocation:Tel Aviv-Yafo

דרושים»חשמל ואלקטרוניקה» ASIC Design Engineer

Project-Based

Description

לפני 14 שעות חברה חסויה Location: Job Type: Write and review micro-architecture specifications Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements Contribute to full chip integration, timing methodology, and analysis Collaborate with verification engineers to resolve bugs and achieve coverage closure Work with the physical design team to close timing and PnR issues Support design methodology evolution and best practices Perform debug, root-cause analysis, and post-silicon validation in the labRequirements: B.Sc./M.Sc. in Electrical Engineering from a top university 3+ years of experience in a relevant field RTL design experience Familiarity with UVM and functional verification methodologiesThis position is open to all candidates. Hide

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